A scalable massively parallel processor for real-time image processing

A processor with 2048 4 b grained processor elements (PE) and a 2 Mb SRAM is implemented in 65 nm CMOS and occupies a 5.29 mm² die. It achieves 200 MHz operation at 1.0 V and outputs peak power efficiency of 310 GOPS/W. The peak performance reached 191 GOPS at 560 MHz and 1.2 V in the double frequency mode. The processor can be optimized for both power and area by changing the number of PEs from 256 to 2048.