Programmability concept of PGA package power and ground pins applicable to different gate array chip designs

The authors describe a metal-mask programmable pin-grid-array (PGA) package constructed such that gate-array chips with different power and ground-pad assignments can be designed and built with no change at the printed circuit board level. The printed circuit board layout design can be finalized early in the product design cycle and should require no later changes due to procurement of gate-array chips from different sources. The use of power planes reduced the power and ground resistance path to their corresponding pins when compared to a conventional design. The inductance, resistance, and decoupling capacitance of the power and ground paths have been measured and compared for both conventional and programmable package designs. The use of planes having more surface area to store capacitance between a power plane and its corresponding ground plane has increased the decoupling effect between them and is beneficial because the planes are closer to the chip than the external decoupling capacitors. The programmable package has been used at 22-MHz clock frequencies with edge rates of 800 mV per 1.5 ns