DocumentCode :
1889146
Title :
Statically sceduling communication resources in multiprocessor DSP architectures
Author :
Sriram, S. ; Lee, Edward A.
Author_Institution :
California Univ., Berkeley, CA, USA
Volume :
2
fYear :
1994
fDate :
31 Oct-2 Nov 1994
Firstpage :
1046
Abstract :
In statically scheduled multiprocessors inter-processor communication resources can be scheduled by determining, at compile time, the order in which processors require access to shared resources and enforcing this order at run time. We show how to choose an access order such that, under certain assumptions, imposing that order incurs no performance penalty
Keywords :
data flow graphs; digital signal processing chips; processor scheduling; resource allocation; shared memory systems; inter-processor communication resources; multiprocessor DSP architectures; shared resources; statically sceduling communication resources; statically scheduled multiprocessors; Computational efficiency; Digital signal processing; Fires; Measurement; Military computing; Optimal scheduling; Processor scheduling; Scheduling algorithm; Taxonomy; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 1994. 1994 Conference Record of the Twenty-Eighth Asilomar Conference on
Conference_Location :
Pacific Grove, CA
ISSN :
1058-6393
Print_ISBN :
0-8186-6405-3
Type :
conf
DOI :
10.1109/ACSSC.1994.471619
Filename :
471619
Link To Document :
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