• DocumentCode
    1891077
  • Title

    Embracing local variability to enable a robust high-gain positive-feedback amplifier: Design methodology and implementation

  • Author

    Ragab, Kareem ; Gharpurey, Ranjit ; Orshansky, Michael

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Texas at Austin, Austin, TX, USA
  • fYear
    2012
  • fDate
    19-21 March 2012
  • Firstpage
    143
  • Lastpage
    150
  • Abstract
    A novel digital calibration technique based on component redundancy and random diversity (CRRD) is used to enable robust high-gain positive-feedback (PF) amplifiers. Gain enhancement is achieved through output conductance cancellation which requires accurate calibration across process, voltage, and temperature. CRRD employs a set of redundant elements intentionally exhibiting high local variability, and the subset of the elements that best cancels amplifier´s output conductance is employed. We develop a novel design methodology to rigorously predict: (1) how to partition the full configuration range between a fixed load and a tunable load, and (2) how, for a given partition, to size the tunable load elements. We prove that having a sizable coarse load is essential for reaching optimality. We apply the developed theory to the design of a 0.18μm CMOS test-chip implementing a 6×10 array of high-gain PF amplifiers based on CRRD. We demonstrate that the use of CRRD allows only linear increase of the array size, and its associated capacitance, with dB gain improvement, in contrast to exponential increase in earlier designs. Gains of ninety amplifiers from three different dies were measured and exceeded 64dB for 95% of the samples, up from an intrinsic gain of 28.5dB. A gain-bandwidth product of 186MHz was measured while consuming 65μA from a 1.8V supply.
  • Keywords
    CMOS analogue integrated circuits; calibration; capacitance; electric admittance; electric potential; feedback amplifiers; integrated circuit design; integrated circuit testing; temperature; CMOS test-chip; CRRD; amplifier output conductance; array size; capacitance; component redundancy and random diversity; current 65 muA; design methodology; digital calibration; frequency 186 MHz; gain 28.5 dB; gain enhancement; gain-bandwidth product; high local variability; high-gain PF amplifier; output conductance cancellation; robust high-gain positive-feedback amplifier; size 0.18 mum; temperature; tunable load element; voltage; voltage 1.8 V; Arrays; Attenuators; Calibration; Capacitance; Gain; Redundancy; Transconductance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design (ISQED), 2012 13th International Symposium on
  • Conference_Location
    Santa Clara, CA
  • ISSN
    1948-3287
  • Print_ISBN
    978-1-4673-1034-5
  • Type

    conf

  • DOI
    10.1109/ISQED.2012.6187487
  • Filename
    6187487