Architecture selection of a flexible DSP core using reconfigurable system software

Author

Lee, Jong-Yeol ; Lee, Dea-Hyun ; Kim, Jong-Sun ; Yoon, Hyun-Dhong ; Kyung, Chong-Min ; Park, Kyu-Ho ; Lee, Yong-Hoon ; Hwang, Seung Ho

Author_Institution

Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea

Volume

6

fYear

1998

fDate

31 May-3 Jun 1998

Firstpage

37

Abstract

MetaCore is a flexible DSP core in that the architecture of MetaCore can be modified easily by changing the hardware parameters. To fully exploit the merits of a flexible core, the system software must be re-configurable when the target architecture changes. In this paper, we present a re-configurable system software for a flexible DSP core and the architecture selection procedure called “compile-simulate-refine” cycle using the re-configurable system software. The “compile-simulate-refine” cycle can make it possible to select the best architecture for a given application by exploring the possible candidate architectures in short time

Keywords

circuit layout CAD; digital signal processing chips; reconfigurable architectures; MetaCore; architecture; compile-simulate-refine cycle; flexible DSP core; reconfigurable system software; Application software; Assembly systems; Computational modeling; Computer architecture; Computer simulation; Costs; Digital signal processing; Hardware; System software; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on

Conference_Location

Monterey, CA

Print_ISBN

0-7803-4455-3

Type

conf

DOI

10.1109/ISCAS.1998.705206

Filename

705206