High-resolution on-chip propagation delay detector for measuring within-chip variation

The authors described a circuit that can measure the propagation delay of a logic circuit directly even for one fan-out 1 inverter of CMOS 90 nm node technology. High-resolution (1 ps) was obtained by converting the propagation delay to the control voltage of the voltage-controlled delay line (VCDL) in delay-locked loop (DLL). The circuit was fabricated with 90 nm CMOS technology and the function has been verified. This circuit could be used for measuring within-chip and chip-to-chip variation that is important for design automation in sub-100nm technology.