Large area MOS-gated power devices using fusible link technology

Author

Venkatraman, Prasad ; Baliga, B.Jayant

Author_Institution

Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA

fYear

1993

fDate

18-20 May 1993

Firstpage

101

Lastpage

106

Abstract

An approach for improving the yield of large-area MOS-gated power devices based on wafer repair using fusible links of aluminum or polysilicon to isolate defective segments from the rest of the device is described. Unlike previously reported wafer repair techniques, the present approach does not require knowledge of the location of the fault (gate-to-source short) within the device. Work done on the development of power-MOS process compatible fusible links is described. Power MOSFETs and IGBTs (insulated-gate bipolar transistors) have been successfully fabricated using these fusible links to perform wafer repair

Keywords

insulated gate bipolar transistors; insulated gate field effect transistors; masks; power transistors; semiconductor technology; thyristors; GTO; IGBTs; MOS controlled thyristors; MOS-gated power devices; MOSFETs; Si; fusible link technology; large-area; mask layout; polysilicon fuses; power-MOS process compatible; wafer repair; Aluminum; Control systems; Fabrication; Fuses; Insulated gate bipolar transistors; MOSFETs; Power electronics; Power engineering and energy; Power engineering computing; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and ICs, 1993. ISPSD '93., Proceedings of the 5th International Symposium on

Conference_Location

Monterey, CA

ISSN

1063-6854

Print_ISBN

0-7803-1313-5

Type

conf

DOI

10.1109/ISPSD.1993.297117

Filename

297117