Investigation of static and dynamic characteristics of SOI-LDMOSFETs passivated with semi-insulating layers

Lateral 600-V DMOSFETs on SOI (silicon-on-insulator) substrates have been used as test devices to compare conventional oxide passivation with a passivation system consisting of oxide and an additional semiresistive layer (SIPOS or Si_xN_y). The effect of the passivation on the breakdown voltage and the dependence of the reverse I-V characteristic on the passivation system, temperature, and substrate voltage are discussed. Both semiresistive layers, SIPOS and Si_xN_y, are shown to reduce the backgate effect in the breakdown voltage and are therefore superior to the conventional oxide passivation. The level of the reverse current is not increased by the parasitic current through the semiresistive layer but is significantly affected by a similar backgate effect. No indication of a degradation of the dynamic performance of the lateral MOSFETs by passivation with a stack of an oxide and a capping semiresistive layer was found