Improved decoding algorithm for high reliable reed muller coding

A new decoding technique for triple error Reed-Muller codes is proposed. In the best of our knowledge this is the first time that Reed-Muller Codes (RMC) as on-chip triple error correcting scheme is reported. We’ve compared the area, delay and power overhead for incorporating RMC and widely used Hamming Codes into a register file. The RMC on-chip results in 4.4X MTTF improvement with fault rate λ=10⁻⁴ and 5X reliability improvement in 512MB memory with λ=10⁻⁵ upsets/bit per day sacrificing area power and delay.