DocumentCode :
1896750
Title :
QuteIP: An IP qualification framework for System on Chip
Author :
Hung, Hsing Chih ; Lin, Ting Hao ; Huang, Chung Yang
Author_Institution :
Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan
fYear :
2007
fDate :
26-29 Sept. 2007
Firstpage :
237
Lastpage :
240
Abstract :
The robustness and reusability of Intelligent Properties (IPs) are the keys to the success of the modern System on Chip (SoC) designs. Therefore, it is very important to implement a rigid IP qualification (IPQ) framework to ensure the quality of IPs in the SoC design flow. In this paper, we carefully examine the advancements and limitations of previous IPQ tools and propose several novel concepts and methodologies to construct a new IPQ framework. We make the framework easily configurable so that it can be applied to different IP vendors with different IP users’ needs. We design the user interface from the practicality point of view so that it is simple, yet complete enough to support various usages in the IP qualification process. Most important of all, our implementation does not include any proprietary information so that the readers should be able to reconstruct a similar IPQ framework on their own. We have deployed our framework to several IP design teams and their feedbacks showed that our IPQ framework can help them reduce the time in design and greatly improve the quality of their IPs.
Keywords :
Consumer electronics; Design engineering; Electronic design automation and methodology; Environmental management; Feedback; Qualifications; Quality management; Robustness; System-on-a-chip; User interfaces;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOC Conference, 2007 IEEE International
Conference_Location :
Hsin Chu, Taiwan
Print_ISBN :
978-1-4244-1592-2
Electronic_ISBN :
978-1-4244-1593-9
Type :
conf
DOI :
10.1109/SOCC.2007.4545466
Filename :
4545466
Link To Document :
بازگشت