Title :
An integrated neural network incorporating a novel synapse design
Author :
Johnson, D.E. ; Marsland, J.S. ; Eccleston, W.
Author_Institution :
Dept. of Electr. Eng., Liverpool Univ., UK
Abstract :
A VLSI implementation of an Artificial Neural Network using a single n-channel MOS transistor per synapse is investigated. The simplicity of the design is achieved by using pulse width modulation to represent neural activity and a novel technique for manipulating synaptic weights. A multi layer perceptron network built in hardware gives good results for a simple classification task
Keywords :
VLSI; neural nets; pulse width modulation; VLSI implementation; multi layer perceptron; n-channel MOS; neural activity; neural network; pulse width modulation; synapse design; synaptic weights;
Conference_Titel :
Hardware Implementation of Neural Networks and Fuzzy Logic, IEE Colloquium on
Conference_Location :
London
