Implementing universal priority DBA algorithm in PIC based EPON testbed

Ethernet Passive Optical Network (EPON) provides a solution to overcome the ever increasing bandwidth demand in the access network of the communication infrastructure. It is normally studied using simulation, but for proof of concept, a testbed is also needed. Current testbed are based on Application-Specific Integrated Circuit (ASIC) and Field-Programmable Gate Array (FPGA) which are not easily configurable. This paper discusses on the usage of Peripheral Interface Controller (PIC) for the EPON testbed to make it easily reconfigurable. The results obtained in terms of bandwidth utilization, jitter and delay show that there are slight expected differences between simulation and testbed. However, the trends of the graphs are of the same and it is concluded that they are in line with each other.