Back-etched super-junction LDMOST on SOI

Author

Honarkhah, Shahla ; Nassif-Khalil, Sameh ; Salama, C. Andre T

Author_Institution

Edward S. Rogers Sr. Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada

fYear

2004

fDate

21-23 Sept. 2004

Firstpage

117

Lastpage

120

Abstract

Conventional super junction LDMOSTs (SJLDMOSTs), fabricated on an SOI substrate, suffer from low breakdown voltage due to substrate-depletion effects. In this work, a back etched SJLDMOST (BSJLDMOST) on SOI is proposed to overcome this problem by eliminating the silicon substrate under the device. The electrical characteristics of the BSJLDMOST on a 0.8 μm SOI film were investigated. The device with 15.5 μm of SJ region exhibits a breakdown voltage of 317 V, a specific on-resistance of 48.3 mΩcm² and a charge on-resistance figure of merit of 4.1 ΩnC. To verify the back etching concept and the suppression of the substrate depletion effect, super-junction diodes (BSJDs) were implemented. These diodes feature a threefold improvement in breakdown voltage over conventional super junction diodes (SJDs) implemented without removing the silicon substrate on the back of the device. A discussion of how the BSJLDMOST can be optimized to break the silicon limit is also provided.

Keywords

etching; power MOSFET; power semiconductor diodes; semiconductor device breakdown; silicon-on-insulator; 0.8 micron; 15.5 micron; 317 V; BSJD; BSJLDMOST; SOI film; Si-SiO₂; back etched SJLDMOST; back-etched super-junction LDMOST; breakdown voltage; charge on-resistance; specific on-resistance; substrate-depletion effect suppression; super-junction diodes; Diodes; Doping; Etching; Low voltage; Performance loss; Power integrated circuits; Silicon on insulator technology; Strontium; Substrates; Switching loss;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European

Print_ISBN

0-7803-8478-4

Type

conf

DOI

10.1109/ESSDER.2004.1356502

Filename

1356502