Title :
A 16 b quadrature direct digital frequency synthesizer using interpolative angle rotation algorithm
Author :
Yongchul Song ; Beomsup Kim
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Taejeon, South Korea
Abstract :
A quadrature direct digital frequency synthesizer (DDFS) is fabricated in 0.35 /spl mu/m CMOS using a new phase-to-sine conversion algorithm. It achieves a spurious-free dynamic range (SFDR) of 96 dB with small-sized lookup tables and appropriate arithmetic hardware. The prototype DDFS IC generates 16 b cosine and sine outputs with an output frequency tuning resolution of 0.03 Hz. It works at 150 MHz sampling rate, consuming 670 mW.
Keywords :
CMOS digital integrated circuits; direct digital synthesis; high-speed integrated circuits; interpolation; table lookup; 0.35 micron; 150 MHz; 670 mW; CMOS IC; arithmetic hardware; cosine outputs; direct digital frequency synthesizer; interpolative angle rotation algorithm; output frequency tuning resolution; phase-to-sine conversion algorithm; quadrature DDS; sine outputs; small-sized lookup tables; Arithmetic; CMOS technology; Dynamic range; Frequency synthesizers; Hardware; Interpolation; Prototypes; Sampling methods; Table lookup; Tuning;
Conference_Titel :
VLSI Circuits Digest of Technical Papers, 2002. Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-7310-3
DOI :
10.1109/VLSIC.2002.1015069
