DocumentCode :
1902791
Title :
Idempotent code generation: Implementation, analysis, and evaluation
Author :
de Kruijf, M. ; Sankaralingam, K.
fYear :
2013
fDate :
23-27 Feb. 2013
Firstpage :
1
Lastpage :
12
Abstract :
Leveraging idempotence for efficient recovery is of emerging interest in compiler design. In particular, identifying semantically idempotent code and then compiling such code to preserve the semantic idempotence property enables recovery with substantially lower overheads than competing software techniques. However, the efficacy of this technique depends on application-, architecture-, and compiler-specific factors that are not well understood. In this paper, we develop algorithms for the code generation of idempotent code regions and evaluate these algorithms considering how they are impacted by these factors. Without optimizing for these factors, we find that typical performance overheads fall in the range of roughly 10-15%. However, manipulating application idempotent region size typically improves the run-time performance of compiled code by 2-10%, differences in the architecture instruction set affect performance by up to 15%, and knowing in the compiler whether control flow side-effects can or cannot occur can impact performance by up to 10%. Overall, we find that, with small idempotent region and careful architecture- and application-specific tuning, it is possible to bring compiler performance overheads consistently down into the single-digit percentage range. The absolute best performance occurs when constructing the largest possible idempotent regions; to this end, however, better compiler support is needed. In the interest of spurring development in this area, we open-source our LLVM compiler implementation and make it available as a research tool.
Keywords :
instruction sets; program compilers; LLVM compiler; application idempotent region size manipulation; application-specific tuning; architecture instruction set; compiler design; control flow side-effects; idempotent code generation; semantic idempotence property; software techniques; Algorithm design and analysis; Checkpointing; Hardware; Partitioning algorithms; Registers; Resource management; Semantics;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Code Generation and Optimization (CGO), 2013 IEEE/ACM International Symposium on
Conference_Location :
Shenzhen
Print_ISBN :
978-1-4673-5524-7
Type :
conf
DOI :
10.1109/CGO.2013.6495002
Filename :
6495002
Link To Document :
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