Title :
0.4-V logic library friendly SRAM array using rectangular-diffusion cell and delta-boosted-array-voltage scheme
Author :
Yamaoka, M. ; Osada, K. ; Ishibashi, K.
Author_Institution :
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
Abstract :
We designed a logic library friendly SRAM array. The array uses rectangular-diffusion cell (RD-cell) and delta-boosted-array-voltage scheme (DBA-scheme). In the RD-cell, the cell ratio is 1.0, and it reduces the imbalance of the cell ratio. A low supply voltage deteriorates the static noise margin, however, the DBA-scheme compensates it. Using the combination of RD-cell and DBA-scheme, a 32-kB test chip achieves 0.4-V operation at 4.5-MHz frequency and 140-/spl mu/W power dissipation and 0.9-/spl mu/A standby current.
Keywords :
SRAM chips; integrated circuit noise; low-power electronics; 0.4 V; 0.9 muA; 140 muW; 32 kB; 4.5 MHz; SRAM array; cell ratio; delta-boosted-array-voltage scheme; logic library; low-voltage operation; power dissipation; rectangular-diffusion cell; standby current; static noise margin; Circuit noise; Laboratories; Libraries; Logic arrays; Logic circuits; Logic design; Low voltage; MOS devices; Random access memory; Shape;
Conference_Titel :
VLSI Circuits Digest of Technical Papers, 2002. Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-7310-3
DOI :
10.1109/VLSIC.2002.1015076
