NeoFlash - True Logic Single Poly Flash Memory Technology

Author

Lee, H.M. ; Woo, S.T. ; Chen, H.M. ; Shen, R. ; Wang, C.D. ; Hsia, L.C. ; Hsu, C.C.-H.

Author_Institution

eMemory Technol. Inc., Hsinchu

fYear

2006

fDate

12-16 Feb. 2006

Firstpage

15

Lastpage

16

Abstract

A new simple and low cost logic based single poly flash memory technology (NeoFlash^reg) with fast programming and high reliability is demonstrated in this paper. With merely 3 additional noncritical masks, the SONOS based technology has been successfully embedded into 0.18mum CMOS logic process. Hot electron injection is utilized to achieve fast programming. Uniform channel tunneling erasure and hot-hole-free operation scheme reinforce reliability and endurance characteristics. Due to the simplicity in cell structure, process and design, small chip area of 2.93mm (cell size 0.76mum) is achieved for 2Mbit embedded flash. Performance of a 2Mbit array proves the great feasibility of this true logic single poly flash memory technology

Keywords

CMOS memory circuits; flash memories; hot carriers; integrated circuit reliability; 0.18 micron; 0.76 micron; 2 Mbit; CMOS logic process; NeoFlash memory; SONOS technology; hot electron injection; hot-hole-free operation scheme; noncritical masks; true logic single poly flash memory technology; uniform channel tunneling erasure; CMOS logic circuits; CMOS process; CMOS technology; Costs; Flash memory; Logic arrays; Logic programming; SONOS devices; Secondary generated hot electron injection; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Non-Volatile Semiconductor Memory Workshop, 2006. IEEE NVSMW 2006. 21st

Conference_Location

Monterey, CA

Print_ISBN

1-4244-0027-9

Type

conf

DOI

10.1109/.2006.1629476

Filename

1629476