Title :
Execution-time profiling for multiple-process behavioral synthesis
Author :
Adams, Jay K. ; Miller, John Alan ; Thomas, Donald E.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
This paper presents a technique for back-annotating the results of high-level synthesis into the source description to produce a timing-accurate behavioral simulation model. The resulting simulation model exhibits the same cycle-by-cycle behavior as a register-transfer level model, but can be simulated in a fraction of the time. This idea has analogies both to software profiling and to back-annotation at lower levels of hardware design. Experimental results demonstrate that the annotated behavioral simulation models run two to three orders of magnitude faster than register-transfer level simulation models, and only about an order of magnitude slower than behavioral models with no timing information
Keywords :
circuit analysis computing; digital simulation; high level synthesis; logic CAD; timing; annotated behavioral simulation; back-annotating; behavioral simulation model; execution-time profiling; hardware design; high-level synthesis; multiple-process behavioral synthesis; register-transfer level model; software profiling; source description; timing; Computational modeling; Computer simulation; Control system synthesis; Delay; Discrete event simulation; Hardware; High level synthesis; Performance analysis; Signal synthesis; Timing;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1995. ICCD '95. Proceedings., 1995 IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
0-8186-7165-3
DOI :
10.1109/ICCD.1995.528803