Title :
Closed-loop control of gate-charge recycling in a 20 MHz dc-dc converter
Author :
Wen, Yue ; Trescases, Olivier
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, Canada
Abstract :
Dynamic power consumption in the gate-drive circuitry limits the light-load efficiency of high frequency integrated dc-dc converters. In this paper a power MOSFET gate charge recycling technique is introduced, where the output capacitor is used to store a portion of the gate charge between switching events. The charge is transferred between the gate of power MOSFET and the output capacitor using transmission gates with precise timing control. The timing of the charge transfer is regulated using a simple digital delay-locked loop. The entire system is designed in 0.13 μm CMOS technology, and simulation results show a total saving of 25% in gate driver power and an overall efficiency improvement of 5% at light load. The converter operates at 20 MHz and converts 2.5 V to 0.8 ~ 1.6 V at up to 300 mA.
Keywords :
DC-DC power convertors; closed loop systems; delays; power MOSFET; power consumption; power system control; CMOS; closed loop control; current 300 mA; dc-dc converter; digital delay locked loop; dynamic power consumption; frequency 20 MHz; gate drive circuitry; power MOSFET gate charge recycling technique; precise timing control; size 0.13 micron; voltage 2.5 V to 0.8 V; Converters; Delay; Driver circuits; Logic gates; Recycling; Voltage control;
Conference_Titel :
Control and Modeling for Power Electronics (COMPEL), 2010 IEEE 12th Workshop on
Conference_Location :
Boulder, CO
Print_ISBN :
978-1-4244-7462-2
Electronic_ISBN :
978-1-4244-7461-5
DOI :
10.1109/COMPEL.2010.5562410