DocumentCode :
1905804
Title :
Device Characterisation of a High-Performance 0.25 μm CMOS Technology
Author :
Woerlee, P.H. ; Juffermans, C.A.H. ; Lifka, H. ; Manders, W.H. ; Pomp, H.G. ; Paulzen, G.M. ; Walker, A.J. ; Woltjer, R.
Author_Institution :
Philips Research Laboratories, P.O. Box 80000, 5600JA Eindhoven, The Netherlands
fYear :
1992
fDate :
14-17 Sept. 1992
Firstpage :
21
Lastpage :
24
Abstract :
The device design, fabrication and characterisation of NMOS and PMOS transistors of a 0.25 μm CMOS technology will be discussed. The devices were optimized for a reduced power supply voltage of 2.5 V. High quality devices with good control of short channel effects were obtained. Hot carrier degradation experiments showed that NMOS devices could operate at 2.5 V supply voltage. The delay per stage of a non-optimized 51-stage ringoscillators fabricated in the 0.25 ??m process was 62 ps at 2.5 V supply voltage which is a 1.5 times improvement over the delay obtained in a 0.5 μm CMOS technology at 3.3V.
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1992. ESSDERC '92. 22nd European
Conference_Location :
Leuven, Belgium
Print_ISBN :
0444894780
Type :
conf
Filename :
5435220
Link To Document :
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