• DocumentCode
    1908207
  • Title

    Nanoscale memories for compute applications

  • Author

    Parat, Krishna

  • Author_Institution
    Intel Corp., Santa Clara, CA, USA
  • fYear
    2010
  • fDate
    13-14 June 2010
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    As the performance gap between the CPU and the HDD has increased over time, NAND Flash based Solid State Drive (SSD) has emerged as an ideal candidate to fill this space. While continued cell scaling will further solidify the position of the NAND Flash in the compute applications, eventually it will hit a scaling wall creating opportunities for other types of memories. The vision for such a future memory technology involves a cross-point memory array that will be stackable in the back end CMOS flow and will be scalable to the 10nm half-pitch and below. Some of these memories, depending upon their improved performance over NAND Flash, may also have their unique position in the overall memory hierarchy of a compute system.
  • Keywords
    CMOS integrated circuits; flash memories; nanotechnology; NAND flash; SSD; back end CMOS flow; cross-point memory array; nanoscale memories; solid state drive; Arrays; Flash memory; International Electron Devices Meeting; Memory management; Random access memory; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Silicon Nanoelectronics Workshop (SNW), 2010
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    978-1-4244-7727-2
  • Electronic_ISBN
    978-1-4244-7726-5
  • Type

    conf

  • DOI
    10.1109/SNW.2010.5562581
  • Filename
    5562581