Title :
Femto-second CMOS technology with high-k offset spacer and SiN gate dielectric with oxygen-enriched interface
Author :
Tsuchiya, R. ; Ohnishi, K. ; Horiuchi, M. ; Tsujikawa, S. ; Shimamoto, Y. ; Inada, N. ; Yugami, J. ; Ootsuka, F. ; Onai, T.
Author_Institution :
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
Abstract :
We demonstrate 40-nm CMOS transistors for the 70-nm technology node. This transistor uses a high-k offset spacer (EOS: high-epsilon offset spacer) in achieving both a short-channel and high drivability along with SiN gate dielectrics with oxygen-enriched interface (OI-SiN) to suppress both the gate-leakage current and boron penetration. Consequently, N-MOSFET and P-MOSFET have high drive currents of 0.68 and 0.30 mA//spl mu/m, respectively, with I/sub off/=10 nA//spl mu/m, with an EOT value of 1.4 nm. The record gate delay of 280 fs (3.6 THz), for an N-MOSFET with the gate length of 19 nm, has also been achieved.
Keywords :
CMOS integrated circuits; MOSFET; VLSI; delays; dielectric thin films; doping profiles; high-speed integrated circuits; interface structure; nanotechnology; oxygen; permittivity; silicon compounds; 1.4 nm; 19 nm; 280 fs; 3.6 THz; 40 nm; 70 nm; CMOS technology; CMOS technology node; CMOS transistors; EOT value; N-MOSFET; OI-SiN; P-MOSFET; SiN:O; boron penetration suppression; drivability; drive currents; gate delay; gate length; gate-leakage current suppression; high-k high-epsilon offset spacer; high-k offset spacer; oxygen-enriched interface SiN gate dielectric; short channel transistors; Boron; CMOS technology; Delay; Earth Observing System; High K dielectric materials; High-K gate dielectrics; MOSFET circuits; Parasitic capacitance; Silicon compounds; Space technology;
Conference_Titel :
VLSI Technology, 2002. Digest of Technical Papers. 2002 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-7312-X
DOI :
10.1109/VLSIT.2002.1015429
