Abstract :
ITC covers material including DFT, ATE architectures, RF testing, design-for-diagnostics, test synthesis and test generation/fault simulation. There are several sessions and presentations supporting the conference theme: tackling test trade-offs. DFT methodologies and their economic impacts will be covered. New DFT and built-in self-test methods will be explored, as well as system-on-a-chip test methods, board standards, BIST, IDDQ, ATE software, SOC testing and managing the cost of ATE.
Keywords :
application specific integrated circuits; automatic test equipment; automatic test pattern generation; built-in self test; fault diagnosis; integrated circuit testing; printed circuit testing; ATE; BIST; DFT; I/sub DDQ/; RF testing; SOC testing; board standards; built-in self-test methods; cost management; design-for-diagnostics; economic impacts; fault simulation; system-on-a-chip test methods; test generation; test synthesis;
