Title :
A software methodology for detecting hardware faults in VLIW data paths
Author :
Bolchini, C. ; Salice, F.
Author_Institution :
Politecnico di Milano, Italy
Abstract :
The proposed methodology aims at providing concurrent hardware fault detection properties in data paths for VLIW processor architectures. The approach, carried out on the application software consists in the introduction of additional instructions for controlling the correctness of the computation with respect to failures in one of the data path functional units. The paper presents the methodology and its application to a set of media benchmarks
Keywords :
computer architecture; fault diagnosis; fault tolerant computing; hardware-software codesign; VLIW processor architectures; application software; clock cycles; design; hardware fault detection; reference architecture; very long instruction word architectures; Algorithm design and analysis; Application software; Computer aided instruction; Computer architecture; Design methodology; Error correction; Fault detection; Hardware; Redundancy; VLIW;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2001. Proceedings. 2001 IEEE International Symposium on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7695-1203-8
DOI :
10.1109/DFTVS.2001.966766
