The Hardware Synthesis of a Java Subset

Author

Thomson, Robert ; Chouliaras, Vassilios ; Mulvaney, David

Author_Institution

Loughborough Univ.

fYear

2006

fDate

Nov. 2006

Firstpage

217

Lastpage

220

Abstract

This paper describes the synthesis of digital hardware from a subset of the Java language. The use of the ANTLR parser generator enabled the rapid creation of a Java front-end. Each Java object instance corresponds to a hardware module instance, and communication between objects is achieved through a common message passing system. The synthesis system outputs RTL net lists written in VHDL

Keywords

Java; grammars; hardware description languages; message passing; ANTLR parser generator; Java language; Java subset; RTL net lists; VHDL; digital hardware; hardware synthesis; message passing system; Computer languages; Concurrent computing; Control system synthesis; Graphics; Hardware design languages; High level languages; Java; Message passing; Signal synthesis; Software debugging;

fLanguage

English

Publisher

ieee

Conference_Titel

Norchip Conference, 2006. 24th

Conference_Location

Linkoping

Print_ISBN

1-4244-0772-9

Type

conf

DOI

10.1109/NORCHP.2006.329214

Filename

4126985

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1916701