Algorithm of cubic coverage building for circuits with flip-flop structures (modified π-algorithm)

Author

Skvortsova, Olga ; Chamyan, Hayk ; Yegorov, Olexandr

Author_Institution

Comput.-Aided Design Dept., Kharkov Nat. Univ. of Radioelectronics, Ukraine

fYear

2002

fDate

2002

Firstpage

51

Lastpage

54

Abstract

Method of cubic covering building for structurally-functional models of digital devices based on π-algorithm is offered. It allows to create cubic coverings and to generate tests for all stuck-at faults of essential circuit lines, where circuits are represented in form of Boolean equations. Object of diagnosis is flip-flop structures represented in form of structural and functional description (Boolean equations in BNF format which is a subset of VHDL and Verilog languages). Mathematical apparatus for representation of object of algorithm is offered.

Keywords

Boolean algebra; fault diagnosis; flip-flops; hardware description languages; logic CAD; logic testing; π-algorithm; BNF format; Boolean equation; VHDL language; Verilog language; cubic algebra; cubic coverage algorithm; digital device; flip-flop circuit; functional model; structural model; stuck-at fault diagnosis; test generation; Buildings; Carbon capture and storage; Circuit testing; Design automation; Equations; Feedback circuits; Flip-flops; Minimization; Sequential circuits; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Modern Problems of Radio Engineering, Telecommunications and Computer Science, 2002. Proceedings of the International Conference

Print_ISBN

966-553-234-0

Type

conf

DOI

10.1109/TCSET.2002.1015852

Filename

1015852