DocumentCode
1917853
Title
A 10-bit 20-Msample/s ADC for low-power and low-voltage applications
Author
Sou, Gérard ; Lu, Guo-Neng ; Klisnick, Geoffroy ; Redon, Michel
Author_Institution
Lab. des Instrum. et Syst., Univ. Pierre et Marie Curie, Paris, France
fYear
1998
fDate
13-16 Sep 1998
Firstpage
51
Lastpage
55
Abstract
For the development of new low-voltage, low-power imaging microsystems, we have designed and fabricated a 10-bit 20 Msample/s ADC. Low-voltage, low-power designs require specifically designed analog building blocks. The ADC makes use of time-interleaving, switched capacitor amplifiers including dynamic frequency compensation and offset cancellation
Keywords
analogue-digital conversion; compensation; low-power electronics; switched capacitor networks; 10 bit; ADC; analog building blocks; dynamic frequency compensation; imaging microsystems; low-power applications; low-voltage applications; offset cancellation; switched capacitor amplifiers; time-interleaving circuits; Capacitors; Computer aided software engineering; Energy consumption; Instruments; Interleaved codes; Low voltage; MOS devices; Operational amplifiers; Power supplies; Rail to rail inputs;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International
Conference_Location
Rochester, NY
ISSN
1063-0988
Print_ISBN
0-7803-4980-6
Type
conf
DOI
10.1109/ASIC.1998.722802
Filename
722802
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