DocumentCode
1920987
Title
Aerodynamics Analysis Acceleration through Reconfigurable Hardware
Author
Andres, E. ; Molina, M. ; Botella, G. ; del Barrio, A. ; Mendias, J.
Author_Institution
Dipt. Arquitectura de Comput. y Autom., Univ. Complutense de Madrid, Madrid
fYear
2008
fDate
26-28 March 2008
Firstpage
105
Lastpage
110
Abstract
The long computation times required to simulate complete aircraft configurations remain as the main bottleneck in the design flow of new structures for the aeronautics industry. In this paper, the novel application of specific hardware in conjunction with conventional processors to accelerate Computational fluid dynamics is explored. First, some general facts about application-specific hardware are presented, placing the focus on the feasibility of the development of hardware modules (FPGAs based) for the acceleration of most time-consuming algorithms in aeronautics analysis. So, a practical methodology for developing an FPGA- based computing solution for the quasi ID Euler equations is applied to the Sod\´s "shock tube" problem. Results comparing CPU-based and FPGA-based solutions are presented, showing that speedups around two orders of magnitude can be expected from the FPGA-based implementation.
Keywords
aerodynamics; aerospace engineering; aircraft testing; computational fluid dynamics; field programmable gate arrays; FPGA-based computing; aerodynamics analysis acceleration; aeronautics industry; aircraft configuration; computational fluid dynamics; quasi 1D Euler equation; reconfigurable hardware; Acceleration; Aerodynamics; Aerospace industry; Aircraft; Algorithm design and analysis; Computational fluid dynamics; Computational modeling; Computer industry; Field programmable gate arrays; Hardware;
fLanguage
English
Publisher
ieee
Conference_Titel
Programmable Logic, 2008 4th Southern Conference on
Conference_Location
San Carlos de Bariloche
Print_ISBN
978-1-4244-1992-0
Type
conf
DOI
10.1109/SPL.2008.4547740
Filename
4547740
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