Analysis and experimental results of a CVTL buffer design

We present experimental results for a new CMOS logic family: Critical Voltage Transition Logic (CVTL). It has a different structure and different operating characteristic compared to existing CMOS logic circuit families. Its novel delay propagation characteristic makes it much faster than the conventional CMOS logic gate. Measurements show that the CVTL buffer is four to eight times faster than the static counterpart. Although it consumes more energy, the energy-delay product is significantly smaller compared with a static CMOS buffer