Highly scalable integrated discrete fourier transformation filter in silicon-on-insulator for next generation WDM systems

Summary form only given. The network traffic is estimated to be quadrupled by the year 2016 and will enter the “zettabyte” era. This ever increasing traffic demands more bandwidth and capacity in future from the long haul optical fiber transmission systems. The deployment of single carrier coherently detected 100 Gbps Polarization Multiplexed Quadrature Phase Shift Keying Wavelength Division Multiplexed (PM-QPSK WDM) systems is expected in the near future. Beyond that, the next generation 400 Gbps WDM systems are gaining lot of attention recently to sustain the traffic growth for the next years [1]. To make such systems spectrally efficient with low price per bit, multiple carrier Coherent Optical Orthogonal Frequency Division Multiplexing (CO-OFDM) is considered as one of the most attractive options. It allows the packing of multiple PM-QPSK carriers in a super-channel delivering high data rates. An all-optical implementation of the CO-OFDM receiver for systems operating at 400Gbps and beyond leads to an energy efficient solution and overcomes the speed limits of electronics.The demultiplexing of spectrally overlapping OFDM sub-carriers requires the Discrete Fourier Transformation (DFT) operation. A generalized schematic for a simple DFT filter for OFDM receiver is schematically shown in figure 1(a). This architecture allows the order R of the DFT filter to be increased by either increasing the order of the couplers or the number of stages N. In comparison to other integrated DFT approaches [2,3], this approach brings flexibility in filter scaling. Each stage of the filter is an MZI and performs the serial to parallel conversion and DFT operation. Various material platforms exist for the implementation of integrated optical circuits. One of them is Siliconon-Insulator (SOI) and is best known for its CMOS compatibility for mass production, energy efficiency, compact and high quality passive components. To emphasize the feasibility of our DFT filter - rchitecture, we fabricated and characterized an 8 DFT filter in 4 μm SOI platform using a cascade of 2 and 4 port MZIs by employing 2 and 4 port Multimode Interference (MMI) couplers. The first stage of the fabricated filter has a 2port MZI with its outputs connected to the two 4-port MZIs in the second stage. The filter with 300 GHz Free Spectral Range (FSR) is designed to demultiplex 8 OFDM sub-carriers, that are QPSK modulated at 37.5 Gbaud resulting in an overall bit rate of 600 Gbps for each polarization. Figures 1(c) and 1(d) shows the filter transmission for TM and TE polarization. The performance of the filter is evaluated by using the measured filter response for an emulation performed in VPITransmissionMaker 8.7 for a 600 Gbps OFDM super-channel. All the channels have a Q value of more than 10 dB [4] to deliver a BER of 10-3. Figure 1(b) shows the constellation diagram obtained by demultiplexing one of the channels using the measurement result from the fabricated filter.