Title :
Channel and switchbox routing with minimized crosstalk. A parallel genetic algorithm approach
Author_Institution :
Tanner Res., Pasadena, CA, USA
Abstract :
Reduction of crosstalk between interconnections becomes an important consideration in today´s VLSI design. This paper presents a novel approach to solve the VLSI channel and switchbox routing problems with the objective of satisfying crosstalk constraints for the nets. The approach is based on a parallel genetic algorithm which runs on a distributed network of workstations. All our routing results are qualitatively better or as good as the best published results. In addition, our algorithm is able to significantly reduce the occurrence of crosstalk
Keywords :
VLSI; circuit layout CAD; circuit optimisation; crosstalk; genetic algorithms; integrated circuit interconnections; integrated circuit layout; network routing; parallel algorithms; VLSI channel routing; VLSI design; VLSI switchbox routing; distributed workstation network; interconnection crosstalk; interconnection routing; minimized crosstalk; parallel genetic algorithm; Algorithm design and analysis; Capacitance; Crosstalk; Delay; Frequency; Genetic algorithms; Integrated circuit interconnections; Pins; Routing; Very large scale integration;
Conference_Titel :
VLSI Design, 1997. Proceedings., Tenth International Conference on
Conference_Location :
Hyderabad
Print_ISBN :
0-8186-7755-4
DOI :
10.1109/ICVD.1997.567956
