Two loop average current control implementation using cypress PSoC with closed loop experimental results

Small signal analysis of active clamped zero-voltage switching (ZVS) current-fed isolated dc/dc converter has been presented is presented in this paper. State space averaging is used to derive the small signal model. A closed loop controller is designed to regulate the converter output over wide range of power (1:10) and source voltage (1:2) with fixed frequency duty cycle modulation. Bode plots are presented using MATLAB and PSIM 9.0 to show the frequency response of the (converter) with and without controller. Designed controller is implemented on mixed signal (analog and digital) processor Cypress PSoC 5 (Programmable System-on-Chip). All components are integrated in Cypress PSoC 5 that is compact, economical, and easily configurable. A 300W converter prototype is developed and tested with implemented controller to observe the performance of the system. Experimental results for step change in load for different input voltage conditions show high performance of the controller, satisfactory transient performance of the converter and voltage regulation with continued safe operation.