Title :
A high speed self-biased CMOS amplifier IP core
Author :
Zhu, Zhangming ; Liu, Lianxi ; Yang, Yintang
Author_Institution :
Microelectron. Inst., Xidian Univ., Xi´´an, China
Abstract :
A novel high speed 0.25 μm CMOS amplifier IP core is presented which use the complementary self-biasing differential amplifier technique. The proposed amplifier features a 418 MHz unity gain frequency and 375 V/μs slew rate with capacitive load 2pF. The output voltage of the proposed amplifier swings from Vgnd to Vdd and the static power less than 0.32 μW. A Verilog-A behavioral model is presented for the amplifier IP core which contains the important non-idealities of the amplifier.
Keywords :
CMOS integrated circuits; differential amplifiers; electronic engineering computing; hardware description languages; 0.25 mum; 375 V; 418 MHz; CMOS amplifier IP core; Verilog-A behavioral model; capacitive load; self-biasing differential amplifier technique; static power; CMOS technology; Differential amplifiers; Equivalent circuits; Frequency; Hardware design languages; Microelectronics; Power amplifiers; Power dissipation; Semiconductor device modeling; Voltage;
Conference_Titel :
VLSI Design and Video Technology, 2005. Proceedings of 2005 IEEE International Workshop on
Print_ISBN :
0-7803-9005-9
DOI :
10.1109/IWVDVT.2005.1504450
