• DocumentCode
    1936680
  • Title

    Composition of ideal C-V curves for ultrathin gate dielectrics based on experimental determination of substrate surface capacitance and potential

  • Author

    Yasuda, N. ; Yamaguchi, T. ; Nishikawa, Y. ; Satake, H. ; Fukushima, N.

  • Author_Institution
    Adv. LSI Technol. Lab., Toshiba Corp., Yokohama, Japan
  • fYear
    2001
  • fDate
    1-2 Nov. 2001
  • Firstpage
    212
  • Lastpage
    213
  • Abstract
    We propose a new method to compose ideal C-V curves for ultrathin gate dielectrics based on experimental determination of substrate surface capacitance and potential. We also demonstrate its effectiveness in extracting equivalent oxide thickness (EOT) and interface state density in high-k dielectric materials. The proposed method can be applied to ultrathin gate dielectrics where the classical analytical model for ideal C-V curves is invalid.
  • Keywords
    MOS capacitors; capacitance; dielectric materials; interface states; surface potential; Au-CeO/sub 2/-Si; Au-ZrO/sub 2/-Si; EOT; Si; equivalent oxide thickness; high-k dielectric materials; ideal C-V curves; interface state density; substrate surface capacitance; substrate surface potential; ultrathin gate dielectrics; CMOS technology; Capacitance; Capacitance-voltage characteristics; Data mining; Dielectric substrates; Gold; High-K gate dielectrics; Interface states; MOS capacitors; Numerical simulation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Gate Insulator, 2001. IWGI 2001. Extended Abstracts of International Workshop on
  • Conference_Location
    Tokyo, Japan
  • Print_ISBN
    4-89114-021-6
  • Type

    conf

  • DOI
    10.1109/IWGI.2001.967586
  • Filename
    967586