Title :
Experimental validation of fault detection and fault tolerance mechanisms
Author :
Gawkowski, Piotr ; Sosnowski, Janusz
Author_Institution :
Inst. of Comput. Sci., Warsaw Univ. of Technol., Poland
Abstract :
The paper deals with the problem of validating the effectiveness of hardware and software mechanisms decreasing system susceptibility to hardware faults. The validation process is based on the use of software implemented fault injector (FITS). The performed analysis concentrates on tuning the profile of faults and experiment set-ups. The presented simulation results are explained in context of the considered applications.
Keywords :
fault tolerance; formal verification; hardware-software codesign; logic testing; FITS; experimental validation; fault detection; fault tolerance; hardware faults; hardware software codesign; software implemented fault injector; Application software; Circuit faults; Costs; Electrical fault detection; Error correction codes; Fault detection; Fault tolerance; Hardware; Redundancy; Very large scale integration;
Conference_Titel :
High-Level Design Validation and Test Workshop, 2002. Seventh IEEE International
Print_ISBN :
0-7803-7655-2
DOI :
10.1109/HLDVT.2002.1224450
