DocumentCode :
1943394
Title :
Design space exploration for data path synthesis
Author :
Manda, C.A. ; Chakrabarti, P.P. ; Ghose, S.
Author_Institution :
Dept. of Comput. Sci. & Eng., Jadavpur Univ., Calcutta, India
fYear :
1997
fDate :
4-7 Jan 1997
Firstpage :
166
Lastpage :
171
Abstract :
In this paper we examine the multi-criteria optimization involved in scheduling for data path synthesis (DPS). We present a method to find non-dominated schedules using a combination of restricted search and heuristic scheduling techniques. Our method supports design with architectural constraints such as the total number of functional units, buses, etc. The schedules produced have been taken to completion using GA-BIND and the results are promising
Keywords :
circuit CAD; high level synthesis; optimisation; scheduling; search problems; GA-BIND; architectural constraints; data path synthesis; design space exploration; multi-criteria optimization; scheduling; Algorithm design and analysis; Computer science; Cost function; Data engineering; Hardware; Processor scheduling; Scheduling algorithm; Space exploration; Space technology; State estimation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1997. Proceedings., Tenth International Conference on
Conference_Location :
Hyderabad
ISSN :
1063-9667
Print_ISBN :
0-8186-7755-4
Type :
conf
DOI :
10.1109/ICVD.1997.568071
Filename :
568071
Link To Document :
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