DocumentCode
1945705
Title
CMOS 1 Micron Isolation Technology using Interface Sealing by Plasma Nitridation : Plasma SILO
Author
Delpech, P. ; Vuillermoz, B. ; Berenguer, M. ; Straboni, A. ; Ternisien, T.
Author_Institution
CNET Centre National d´´Etudes des Télécommunications, Chemin du Vieux Chêne, BP 98, F-38243 Meylan Cedex, France
fYear
1988
fDate
13-16 Sept. 1988
Abstract
The improvement of a 1 ¿m CMOS process using PLASMA SILO as an isolation technique has been evaluated by comparison with a classical LOCOS. The PLASMA SILO provides a reduction of 0.4 ¿m in the channel width loss, and a gain on the narrow channel effect. The other electrical characteristics are maintained (subthreshold characteristics, gate oxide integrity, etc,)
Keywords
CMOS process; Isolation technology; Oxidation; Plasma applications; Plasma chemistry; Plasma measurements; Plasma properties; Plasma temperature; Resumes; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1988. ESSDERC '88. 18th European
Conference_Location
Montpellier, France
Print_ISBN
2868830994
Type
conf
Filename
5436960
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