Evaluations of package technologies for power distribution network decoupling by measurement and correlation

A design of the proper frequency behavior of a power distribution network (PDN) of input/output (I/O) circuitry of an FPGA enhances performance and is able to withstand synchronous switching noise (SSN) for applications in specific frequency bandwidths. A methodology of PDN evaluation and modeling is presented in this paper, with different types of packages having on-package decoupling capacitance (OPD) of 10 nF (chip), and embedded on-package decoupling capacitances (EPD) of 10 nF (film), and 100 nF (chip) studied for evaluation. The working models of PDN in the 300 kHz-6 GHz range for all packages are designed and summarized in the paper. Direct measurement of chip PDN impedance is quite complicated because it requires applying wideband microprobes to a very small area. Instead, a power supply compression (PSC) measurement due to SSN in FPGA is used to view the impedance from the silicon side. This method is compared with indirect measurement of PDN done from the ball side. A second method requires standard 1 mm microprobes and VNA with the following processing of data and equivalent circuit reconstruction. This very elaborate technique clearly describes one peak PDN (neither OPD nor EPD), but requires additional tweaking to get the correct peak positions of packages with OPD (or EPD).