DocumentCode
1947633
Title
Methodology of process evaluation with wafer-mapping techniques for statistical process control
Author
Takeda, Tadao
Author_Institution
NTT LSI Labs., Kanagawa, Japan
fYear
1994
fDate
22-25 Mar 1994
Firstpage
85
Lastpage
89
Abstract
A methodology of process evaluation for statistical process control is proposed. Process control is accomplished with new wafer-mapping techniques, uniformity evaluation methods, and correlation analysis methods. Using these methods, uniformities of the processing and device characteristics of a wafer are so convenient and precisely evaluated that they will be essential for the development of high-performance ULSI technologies
Keywords
VLSI; correlation methods; semiconductor process modelling; statistical process control; correlation analysis methods; device characteristics; high-performance ULSI technologies; process evaluation; statistical process control; uniformity evaluation methods; wafer-mapping techniques; Etching; Gas insulation; Laboratories; Large scale integration; Manufacturing; Process control; Sampling methods; Silicon; Ultra large scale integration; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 1994. ICMTS 1994. Proceedings of the 1994 International Conference on
Conference_Location
San Diego, CA
Print_ISBN
0-7803-1757-2
Type
conf
DOI
10.1109/ICMTS.1994.303497
Filename
303497
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