A sigma-delta ADC with a built-in anti-aliasing filter for Bluetooth receiver in 130nm digital process

Author

Koh, Jinseok ; Muhammad, Khurram ; Staszewski, Bogdan ; Gomez, Gabriel ; Horoun, Baher

Author_Institution

Wireless Bus. Terminal Unit, Texas Instrum. Inc., Dallas, TX, USA

fYear

2004

fDate

3-6 Oct. 2004

Firstpage

535

Lastpage

538

Abstract

A discrete-time sigma delta ADC is presented, that filters and decimates by two the input data samples, while providing amplification in its input sampling stage. This compact architecture allows operating preceding blocks at twice the ADC´s clock frequency, thus improving the noise performance of the receive channel. The presented approach has been validated and incorporated in a commercial Bluetooth receiver IC, realized in a 1.5 V, 130 nm digital CMOS process.

Keywords

Bluetooth; CMOS integrated circuits; FIR filters; discrete time filters; sigma-delta modulation; switched capacitor filters; 1.5 V; 130 nm; Bluetooth receiver; anti-aliasing filter; decimation filter; digital CMOS process; discrete-time ADC; input sampling stage amplification; low noise receive channel; sigma-delta ADC; switched capacitor FIR filter; switched capacitor sampling network; Bluetooth; CMOS digital integrated circuits; CMOS integrated circuits; CMOS process; Clocks; Delta-sigma modulation; Digital filters; Frequency; Integrated circuit noise; Sampling methods;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004

Print_ISBN

0-7803-8495-4

Type

conf

DOI

10.1109/CICC.2004.1358877

Filename

1358877