DocumentCode :
1952393
Title :
ULSI DRAM technology with Ba/sub 0.7/Sr/sub 0.3/TiO/sub 3/ film of 1.3nm equivalent SiO/sub 2/ thickness and 10/sup -9/ A/cm/sup 2/ leakage current
Author :
Fujii, E. ; Uemoto, Y. ; Hayashi, S. ; Nasu, T. ; Shimada, Y. ; Matsuda, A. ; Kibe, M. ; Azuma, M. ; Otsuki, T. ; Kano, G. ; Scott, M. ; McMillan, L.D. ; Paz de Araujo, C.A.
Author_Institution :
Electron. Res. Lab., Matsushita Electron. Corp., Osaka, Japan
fYear :
1992
fDate :
13-16 Dec. 1992
Firstpage :
267
Lastpage :
270
Abstract :
A high-dielectric constant material have received increasing attention in view of an application to ULSI DRAMs for keeping a simple cell structure. We demonstrate a new technology with a planar-type single stacked structure utilizing a high-dielectric constant film of Ba/sub 1-x/Sr/sub x/TiO/sub 3/ (BST). The fabricated memory cell capacitor shows a low leakage current of 2*10/sup -9/ A/cm/sup 2/ under an applied voltage of 3.3V and a large capacitance of 32fF/um/sup 2/, which means that the BST film is equivalently as thin as 1.3nm of SiO/sub 2/.<>
Keywords :
DRAM chips; VLSI; barium compounds; chemical vapour deposition; dielectric thin films; diffusion in solids; integrated circuit technology; 1.3 nm; 3.3 V; BST film; Ba/sub 0.7/Sr/sub 0.3/TiO/sub 3/; Ba/sub 0.7/Sr/sub 0.3/TiO/sub 3/ film; MOD; Pt-TiN-Ti; Pt/TiN/Ti electrode; SiO/sub 2/; ULSI DRAM technology; high-dielectric constant material; memory cell capacitor; planar-type single stacked structure; Barium compounds; CVD; DRAM chips; Dielectric films; Diffusion processes; Integrated circuit fabrication; Very-large-scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1992. IEDM '92. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
ISSN :
0163-1918
Print_ISBN :
0-7803-0817-4
Type :
conf
DOI :
10.1109/IEDM.1992.307357
Filename :
307357
Link To Document :
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