Implementation of Surface Gratings for Reduced Coupling Noise in Silicon-on-Insulator Circuits

Coupling light into a silicon-on-insulator photonic chip has always been the first hurdle to overcome when using photonic integrated circuits. For applications that require robust, low-noise performance, and high degree of multiplexing, flood illuminating an array of vertical grating couplers is a promising approach to couple input light into the chip waveguides. This technique provides a very high alignment tolerance and allows simultaneous excitation of multiple waveguides for rapid parallel readout. However, parasitic reflections of the coupled light on the chip substrate introduce interferences and limit the device performance. We investigate the use of grating structures implemented on the chip surface to limit these parasitic signals and demonstrate a significant reduction of the coupling noise.