FPGA implementation of GZIP compression and decompression for IDC services

In the large scale data processing of Internet, data compression and decompression is a very important technology which can significantly improve the valid capacity of the disk and the valid bandwidth of IO, which can reduce the costs of IDC and accelerate application programs. This paper describes a low-cost FPGA hardware architecture of GZIP compression and decompression, which has been applied to IDC services successfully. Depending on different applications, the disk IO utilization has been improved by 300 to 500 percent, and the programs are accelerated by 30% to 200%, while 1 to 3 CPU-core resources could be released.