Title :
Quality of EDA CAD tools: definitions, metrics and directions
Author :
Farrahi, A.H. ; Hathaway, D.J. ; Wang, M. ; Sarrafzadeh, M.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
In this paper we survey major problems faced by EDA tools in tackling deep submicron (DSM) design challenges like: crosstalk, reliability, power and interconnect dominated delay. We discuss the need for rethinking quality models used in EDA tools to allow early and reliable planning, estimation, analysis, and optimization. Key design quality metrics from a CAD tool perspective are surveyed, and methodologies and directions are proposed for the next generation design automation tools, intended to meet the challenges ahead. Ideas such as forward synthesis, incremental synthesis, system-level interconnect prediction and planning, and their implications on design quality design tool architecture, and design methodology are explored
Keywords :
VLSI; circuit CAD; crosstalk; delays; integrated circuit design; integrated circuit interconnections; integrated circuit reliability; EDA CAD tools; crosstalk; deep submicron design challenges; design methodology; design tool architecture; forward synthesis; incremental synthesis; interconnect dominated delay; next generation design automation tools; planning; quality models; reliability; system-level interconnect prediction; Circuit noise; Circuit synthesis; Crosstalk; Design automation; Design methodology; Electronic design automation and methodology; Energy consumption; Integrated circuit interconnections; Semiconductor device noise; Very large scale integration;
Conference_Titel :
Quality Electronic Design, 2000. ISQED 2000. Proceedings. IEEE 2000 First International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
0-7695-0525-2
DOI :
10.1109/ISQED.2000.838903
