DocumentCode :
1956713
Title :
Formal Hardware Verification: A Users´ View Summary
Author :
Mavaddat, Farhad
fYear :
1998
fDate :
13-16 Sep 1998
Firstpage :
418
Lastpage :
418
Keywords :
Automata; CMOS logic circuits; Debugging; Explosions; Hardware; Laboratories; Logic design; Minimization; Software design; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International
ISSN :
1063-0988
Print_ISBN :
0-7803-4980-6
Type :
conf
DOI :
10.1109/ASIC.1998.723088
Filename :
723088
Link To Document :
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