Title :
A layout-aware synthesis methodology for RF circuits
Author :
Vancorenland, P. ; Van der Plas, G. ; Steyaert, M. ; Gielen, G. ; Sansen, W.
Author_Institution :
Dept. of Electr. Eng., Katholieke Univ., Leuven, Belgium
Abstract :
In this paper a layout-aware RF synthesis methodology is presented. The methodology combines the power of a differential evolution algorithm with cost function response modeling and integrated layout generation to synthesize RF Circuits efficiently, taking into account all layout parasitics during the circuit optimization. The proposed approach has successfully been applied to the design of a high-performance downconverter mixer circuit, proving the effectiveness of the implemented design methodology.
Keywords :
analogue integrated circuits; circuit optimisation; evolutionary computation; integrated circuit layout; mixers (circuits); RF circuit; circuit optimization; cost function response model; differential evolution algorithm; downconverter mixer circuit design; layout generation; layout-aware synthesis methodology; parasitics; Central Processing Unit; Circuit noise; Circuit simulation; Circuit synthesis; Cost function; Design optimization; Integrated circuit synthesis; Power generation; Programmable logic arrays; Radio frequency;
Conference_Titel :
Computer Aided Design, 2001. ICCAD 2001. IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-7803-7247-6
DOI :
10.1109/ICCAD.2001.968647