• DocumentCode
    1960293
  • Title

    Towards Modeling Interconnection Networks of Exascale Systems with OMNet++

  • Author

    Yebenes, P. ; Escudero-Sahuquillo, Jesus ; Garcia, Pedro Javier ; Quiles, Francisco J.

  • Author_Institution
    Comput. Syst. Dept., Univ. de Castilla-La Mancha, Albacete, Spain
  • fYear
    2013
  • fDate
    Feb. 27 2013-March 1 2013
  • Firstpage
    203
  • Lastpage
    207
  • Abstract
    One of the objectives of the decade for High-Performance Computing systems is to reach the exascale level of computing power before 2018, hence this will require strong efforts in their design. In that sense, High-speed low-latency interconnection networks are essential elements for exascale HPC systems. Indeed, the performance of the whole system depends on that of the interconnection network. In order to develop and test new techniques, suited to exascale HPC systems, software-based networks simulators are commonly used. As developing a network simulator from scratch is a difficult task, several platforms help the developers, OMNeT++ being one of the most popular. In this paper, we propose a new generic network simulator, exploiting the features of the OMNeT++ framework. The proposed tool is the first step to model HPC high-performance interconnection networks of exascale HPC systems: the message switching layer, routing and arbitration algorithms and buffer organizations have been modeled according to the current and expected characteristics of these systems. In addition, the tool has been designed so that it is possible to simulate networks of large size. Simulation results, validated against real systems, show the accuracy of the model.
  • Keywords
    discrete event simulation; multiprocessor interconnection networks; network routing; parallel processing; performance evaluation; OMNeT++ framework; arbitration algorithm; buffer organizations; exascale HPC systems; high-performance computing systems; high-speed low-latency interconnection networks; interconnection network modeling; message switching layer; routing algorithm; software-based networks simulators; Compounds; Computational modeling; Logic gates; Multiprocessor interconnection; Ports (Computers); Registers; Routing; HPC interconnection networks; OMNeT++; Performance evaluation; Simulation tools;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel, Distributed and Network-Based Processing (PDP), 2013 21st Euromicro International Conference on
  • Conference_Location
    Belfast
  • ISSN
    1066-6192
  • Print_ISBN
    978-1-4673-5321-2
  • Electronic_ISBN
    1066-6192
  • Type

    conf

  • DOI
    10.1109/PDP.2013.36
  • Filename
    6498553