Statistical advantages of intrinsic channel fully depleted SOI MOSFETs over bulk MOSFETs

Statistical characteristics of intrinsic channel fully depleted (FD) SOI MOSFETs and conventional bulk MOSFETs are compared. It is experimentally shown that not only threshold voltage (Vth) variability but drain induced barrier lowering (DIBL) and current onset voltage (COV) variability is well suppressed in FD SOI MOSFETs. Moreover, time-dependent Vth change due to random telegraph noise (RTN) is also smaller in FD SOI MOSFETs. The mechanisms of these variability suppressions are discussed using three dimensional device simulation and it terms out that the absence of random dopant fluctuation (RDF) is responsible for the suppressed variability. These results strongly demonstrate the advantage of intrinsic channel MOSFETs where the channel does not include dopant atoms.