DocumentCode
1965463
Title
Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers
Author
Di Natale, G. ; Flottes, M. -L ; Rouzeyre, B.
Author_Institution
Lab. d´´Inf., de Robot. et de Microelectron. de Montpellier (LIRMM), Univ. Montpellier II, Montpellier, France
fYear
2010
fDate
13-15 Jan. 2010
Firstpage
256
Lastpage
261
Abstract
This paper proposes a novel method intended to accelerate the checking of the robustness of a device against Differential Power Analysis. We propose an algorithm for the automatic selection of shortest short input vector sequence that leads to the secret key breakthrough. We show that the selected sequence remains valid for different designs of the same cryptographic function.
Keywords
cryptography; optimisation; cryptographic function; differential power analysis; execution time optimization; input vector sequence; resistance evaluation; secure device design; Circuit simulation; Computer hacking; Cryptography; Design optimization; Electronic equipment testing; Energy consumption; Information security; Monitoring; Performance evaluation; Robustness; DPA Robustness Evaluation; Design of secure devices;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Design, Test and Application, 2010. DELTA '10. Fifth IEEE International Symposium on
Conference_Location
Ho Chi Minh City
Print_ISBN
978-0-7695-3978-2
Electronic_ISBN
978-1-4244-6026-7
Type
conf
DOI
10.1109/DELTA.2010.50
Filename
5438680
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