Power-efficient I/O design considerations for high-bandwidth applications

Power-efficiency results from several generations of I/O interfaces with specific goals are presented as well as the tradeoffs made within and across those designs. Foundational work in active-power reduction at a single rate for a symmetric system, the subsequent application of that work to a burst-mode asymmetric interface, and recent research on low-overhead bursting are discussed. Dynamic voltage frequency scaling and efficiency increases enabled by system level interconnect improvements are also considered as important techniques.